The Mc68000 emulator was designed in order to execute 68K music player, which is a main reason of its being. Doing a 68K emulator is not a very easy things and it will be great if this one could be used for other tasks.
The application need maximum control over emulation behaviour such as register access, memory access, IO-processor hot plugin...
The emulation must be fast enought to avoid processor overload.

The SSG is an NMOS-LSI device designed to be capable of music generation. It only requires the microprocessor [68000] to iniatilize its regiser array, thus reducing the load on the CPU. Music generation is carried out by three sequence square wave generator, noise generator, and envelop generator accordig to the set of parameters. This allow for the generation of music, special effects, warnings and various other types of sound.

5V single power supply

Easy connection to 8 bit or 16 bit CPU

Simple connection to external system through 2 sequence 8 bit I/O port

Wide voicing range of 8 octaves

Smooth attenuation by 5 bit envelope generaror

Built-in 5 bit D/A convertor

Input of double frequency clock can be handled by built-in clock frequency divider

TTL compatible level

40 pin plastic package

Pin compatible with AY-3-8910 manufactured by GI

All functons of the SSG are controled by the 16 internal registers. The CPU need only write data to the internal registers of the SSG. The SSG itself generates the sound.
Sound is generated by the following blocks:

YM2149 function blocks

Music generator	Square waves generator for each channel
Noise generator	Pseudo-random waveforms generator for each channel
Mixer	Music and noise output are mixed for each channel
Level control	Constant or variable level is given for each channel
Envelop generator	Generate various type of level envelop (only one)
D-A convertor	Sound is output at the level determined by the level control for each channel

The CPU can read the contents of the internal registers with no effect on sound.

Register Array table

		B7	B6	B5	B4	B3	B2	B1	B0
R0	Tone period [channel A]	8 bit fine tone adjustement
R1						4 bit rought tone adjustement
R2	Tone period [channel B]	8 bit fine tone adjustement
R3						4 bit rought tone adjustement
R4	Tone period [channel C]	8 bit fine tone adjustement
R5						4 bit rought tone adjustement
R6	Noise period				5 bit noise period
R7	I/O port and mixer settings	I/O		Noise			Tone
		IOB	IOA	C	B	A	C	B	A
R8	Level [channel A]				M	4 bit level
R9	Level [channel B]				M	4 bit level
RA	Level [channel C]				M	4 bit level
RB	Envelope period	8 bit fine adjustement
RC		8 bit rough adjustement
RD	Shape of envelope					CONT	ATT	ALT	HOLD
						0	0
						0	1
						1	0	0	0
						1	0	0	1
						1	0	1	0
						1	0	1	1
						1	1	0	0
						1	1	0	1
						1	1	1	0
						1	1	1	1
RE	I/O port A data	8 bit data
RF	I/O port B data	8 bit data

Setting of music frequencies [R0~R5]

The frequencies of the square wave generated by the music generators for the three channels (A,B and C) are controlled by registers R0 through R5. The oscillation frequency Ftone is obtained in the following manner from the value of the register TP. Ftone = Fmaster / 16 * TP Where:

Fmaster

Master clock frequency (2Mhz for the Atari STtm).

TP

Tone period given by registers R0~R5 (TPA=R0+256*R1...)

Setting of noise generator [R6]

The Random Number Generator of the 8910 is a 17-bit register. The input to the register is bit0 XOR bit2 (bit0 is the output).
The noise frequency Fnoise is obtained from the register NP in the following manner: Fnoise = Fmaster / 16 * NP Where:

NP

Noise period given by the 5 less signifiant bit of register R6.

Setting of mixer and I/O ports [R7]

The mixer is used to combined music and noise components. The combination is determined by bits B5~B0 of register R7. Both Noise (B5~B3) and Tone (B2~B0) bit are active when a "0" is written.
The I/O port settings have nothing to do with sound generation. Selection of input/output for the I/O ports is determined by B7 and B6 of register R7 for respectively port-B and port-A. Input is selected when "0" is written.

Level control [R8~RA]

The audio level output from the D/A convertors for the three channels (A,B, and C) is respectively adjusted by the registers R8, R9 and RA. Bit B4 defines the mode. When mode is "0" the level is determined by the bits B3~B0. When mode is "1" the level is determined by the 5 bit output of the envelop generator (E4~E0), B3~B0 are ignored.

Setting of envelope frequency

The envelope update frequency FEA is obtained as follow from the envelope setting period value EP. FEA = Fmaster / 8 * EP Where:

EP

Envelope period given the registers RC~RB.

The envelope repetition frequency FE is obtained as follow from the envelope update frequency FEA FE = FEA / 32

Envelope shape control [RD]

The envelope generator counts the envelope clock FEA 32 times for each envelope pattern cycle. The level is determined by the 5 bit output (E4~E0) of the counter. The shape of this envelope is created by increasing, decreasing, stopping or repeating this counter. The shape is controlled by bits B3~B0 of the register RD (see Register Array table). Envelope shape is restarted each time the register RD is written.

I/O port data hold [RE and RF]

Register RE and RF are used to store the data written from the CPU to the I/O ports A and B respectively.

Each of the three channels is equiped with a D/A convertor which converts the calculated digital values to analog signals for output.
When the maximum amplitude is normalized to 1V, the levels shown in figure below are obtained. This convertion from a linear input to a logarithmic output provides a wide dynamic range and a natural feeling attenuation.