macro68.h File Reference

Detailed Description

68K instruction emulation macro definitions.

Author:: Benjamin Gerard <ben@sashipa.com>

Date:: 1999/13/03

Id: macro68.h,v 2.2 2003/10/29 06:50:41 benjihan Exp

#include "emu68/srdef68.h"
#include "emu68/excep68.h"

Go to the source code of this file.

Cycle counter

#define ADDCYCLE(N)

Dummy internal cycle counter.

#define SETCYCLE(N)

Dummy internal cycle counter.

Exception handling

#define EXCEPTION(VECTOR, LVL)

General exception or interruption.

#define ILLEGAL

Illegal instruction.

#define BUSERROR(ADDR, MODE)

Bus error exception.

#define LINEA   EXCEPTION(LINEA_VECTOR,LINEA_LVL)

Line A exception.

#define LINEF   EXCEPTION(LINEF_VECTOR,LINEF_LVL)

Line F exception.

#define TRAPV   if(reg68.sr&SR_V) EXCEPTION(TRAPV_VECTOR,TRAPV_LVL)

TRAPV exception.

#define TRAP(TRAP_N)   EXCEPTION(TRAP_VECTOR(TRAP_N),TRAP_LVL)

TRAP exception.

#define CHK   EXCEPTION(CHK_VECTOR,CHK_LVL)

CHK exception.

#define CHKW(CHK_A, CHK_B)   if((CHK_B)<0 || (CHK_B)>(CHK_A)){ CHK; }

CHKW exception.

Program control instructions

#define NOP

No Operation.

#define RESET   EMU68_reset()

Soft reset.

#define STOP   reg68.sr = (u16)get_nextw(); reg68.status = 1

STOP.

#define RTS   reg68.pc = popl()

Return from subroutine.

#define RTE   reg68.sr = popw(); RTS

Return from exception.

#define RTR   reg68.sr = (reg68.sr&0xFF00) | (u8)popw(); RTS

Return from exception restore CCR only.

Miscellaneous instructions

#define NBCDB(NBCD_S, NBCD_A)   (NBCD_S)=(NBCD_A)

Binary coded decimal sign change.

#define EXG(A, B)   (A)^=(B); (B)^=(A); (A)^=(B)

Register MSW/LSW exchange.

#define EXTW(D)   (D) = ((D)&0xFFFF0000) | ((u16)(s32)(s8)(D))

Byte to word sign extension.

#define EXTL(D)   (D) = (s32)(s16)(D)

Word to long sign extension.

#define TAS(TAS_A)   { TSTB(TAS_A,TAS_A); (TAS_A) |= 0x80000000; }

Test and set (mutual exclusion).

#define CLR(CLR_S, CLR_A)

Generic clear memory or register.

#define CLRB(A, B)   CLR(A,B)

Byte memory or register clear.

#define CLRW(A, B)   CLR(A,B)

Word memory or register clear.

#define CLRL(A, B)   CLR(A,B)

Long memory or register clear.

#define LINK(R_LNK)

Link (frame pointer).

#define UNLK(R_LNK)

UNLK (frame pointer).

#define SWAP(SWP_A)

Register value swapping.

Bit instructions

#define BTST(V, BIT)   reg68.sr = (reg68.sr&(~SR_Z)) | (((((V)>>(BIT))&1)^1)<<SR_Z_BIT)

Bit test and set.

#define BSET(V, BIT)

Bit set.

#define BCLR(V, BIT)

Bit clear.

#define BCHG(V, BIT)

Bit change.

Move & test instructions

#define MOVE(MOV_A)

#define TST(TST_V)   MOVE(TST_V)

#define TSTB(TST_S, TST_A)   { TST_S=TST_A; TST(TST_S); }

#define TSTW(TST_S, TST_A)   { TST_S=TST_A; TST(TST_S); }

#define TSTL(TST_S, TST_A)   { TST_S=TST_A; TST(TST_S); }

Multiply & Divide instructions

#define MULSW(MUL_S, MUL_A, MUL_B)   MUL_S = muls68(MUL_A, MUL_B)

Signed multiplication.

#define MULUW(MUL_S, MUL_A, MUL_B)   MUL_S = mulu68(MUL_A, MUL_B)

Unsigned multiplication.

#define DIVSW(DIV_S, DIV_A, DIV_B)   DIV_S = divs68(DIV_A, DIV_B)

Signed divide.

#define DIVUW(DIV_S, DIV_A, DIV_B)   DIV_S = divu68(DIV_A, DIV_B)

Unsigned divide.

Logical instructions

#define AND(AND_S, AND_A, AND_B)   AND_S = and68(AND_A, AND_B)

Generic bitwise AND.

#define ANDB(AND_S, AND_A, AND_B)   AND(AND_S, AND_A, AND_B)

Byte bitwise AND.

#define ANDW(AND_S, AND_A, AND_B)   AND(AND_S, AND_A, AND_B)

Word bitwise AND.

#define ANDL(AND_S, AND_A, AND_B)   AND(AND_S, AND_A, AND_B)

Long bitwise AND.

#define ORR(ORR_S, ORR_A, ORR_B)   ORR_S = orr68(ORR_A, ORR_B)

Generic bitwise OR.

#define ORB(ORR_S, ORR_A, ORR_B)   ORR(ORR_S, ORR_A, ORR_B)

Byte bitwise OR.

#define ORW(ORR_S, ORR_A, ORR_B)   ORR(ORR_S, ORR_A, ORR_B)

Word bitwise OR.

#define ORL(ORR_S, ORR_A, ORR_B)   ORR(ORR_S, ORR_A, ORR_B)

Long bitwise OR.

#define EOR(EOR_S, EOR_A, EOR_B)   EOR_S = eor68(EOR_A, EOR_B)

Generic bitwise EOR (exclusive OR).

#define EORB(EOR_S, EOR_A, EOR_B)   EOR(EOR_S, EOR_A, EOR_B)

Byte bitwise EOR (exclusif OR).

#define EORW(EOR_S, EOR_A, EOR_B)   EOR(EOR_S, EOR_A, EOR_B)

Word bitwise EOR (exclusif OR).

#define EORL(EOR_S, EOR_A, EOR_B)   EOR(EOR_S, EOR_A, EOR_B)

Long bitwise EOR (exclusif OR).

#define NOT(NOT_S, NOT_A)   NOT_S = not68(NOT_A)

Generic first complement.

#define NOTB(A, B)   NOT(A,B)

Byte first complement.

#define NOTW(A, B)   NOT(A,B)

Word first complement.

#define NOTL(A, B)   NOT(A,B)

Long first complement.

Arithmetic instructions

#define ADD(ADD_S, ADD_A, ADD_B, ADD_X)   ADD_S=add68(ADD_A,ADD_B,ADD_X)

#define SUB(SUB_S, SUB_A, SUB_B, SUB_X)   SUB_S=sub68(SUB_B,SUB_A,SUB_X)

#define CMP(SUB_A, SUB_B)   sub68(SUB_B,SUB_A,0)

#define ADDB(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B,0)

#define ADDW(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B,0)

#define ADDL(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B,0)

#define ADDXB(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)<<(24-SR_X_BIT))

#define ADDXW(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)<<(16-SR_X_BIT))

#define ADDXL(ADD_S, ADD_A, ADD_B)   ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)>>SR_X_BIT )

#define ADDA(ADD_S, ADD_A, ADD_B)   (ADD_S) = (ADD_A) + (ADD_B)

#define ADDAW(ADD_S, ADD_A, ADD_B)   ADDA(ADD_S, ADD_A>>16, ADD_B)

#define ADDAL(ADD_S, ADD_A, ADD_B)   ADDA(ADD_S, ADD_A, ADD_B)

#define SUBB(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B,0)

#define SUBW(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B,0)

#define SUBL(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B,0)

#define SUBXB(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)<<(24-SR_X_BIT))

#define SUBXW(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)<<(16-SR_X_BIT))

#define SUBXL(SUB_S, SUB_A, SUB_B)   SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)>>SR_X_BIT)

#define SUBA(SUB_S, SUB_A, SUB_B)   (SUB_S) = (SUB_B) - (SUB_A)

#define SUBAW(SUB_S, SUB_A, SUB_B)

#define SUBAL(SUB_S, SUB_A, SUB_B)   SUBA(SUB_S, SUB_A, SUB_B)

#define CMPB(CMP_A, CMP_B)   CMP(CMP_A, CMP_B)

#define CMPW(CMP_A, CMP_B)   CMP(CMP_A, CMP_B)

#define CMPL(CMP_A, CMP_B)   CMP(CMP_A, CMP_B)

#define CMPA(CMP_A, CMP_B)   CMP(CMP_A, CMP_B)

#define CMPAW(CMP_A, CMP_B)

#define CMPAL(CMP_A, CMP_B)   CMP(CMP_A, CMP_B)

#define NEGB(NEG_S, NEG_A)   SUBB(NEG_S,NEG_A,0)

#define NEGW(NEG_S, NEG_A)   SUBW(NEG_S,NEG_A,0)

#define NEGL(NEG_S, NEG_A)   SUBL(NEG_S,NEG_A,0)

#define NEGXB(NEG_S, NEG_A)   SUBXB(NEG_S,NEG_A,0)

#define NEGXW(NEG_S, NEG_A)   SUBXW(NEG_S,NEG_A,0)

#define NEGXL(NEG_S, NEG_A)   SUBXL(NEG_S,NEG_A,0)

Logical & Arithmetic bit shifting instructions

#define LSR(LSR_A, LSR_D, LSR_MSK, LSR_C)

generic right shift.

#define LSRB(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFF000000,(1<<24))

Byte logical right shift.

#define LSRW(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFFFF0000,(1<<16))

Word logical right shift.

#define LSRL(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFFFFFFFF,(1<<0))

Long logical right shift.

#define ASRB(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFF000000,(1<<24))

Byte arithmetic right shift.

#define ASRW(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFFFF0000,(1<<16))

Word arithmetic right shift.

#define ASRL(LSR_A, LSR_B)   LSR(LSR_A,LSR_B,0xFFFFFFFF,(1<<0))

Long arithmetic right shift.

#define LSL(LSL_A, LSL_D, LSL_MSK)

Generic left shift.

#define LSLB(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFF000000)

Byte logical left shift.

#define LSLW(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFFFF0000)

Word logical left shift.

#define LSLL(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFFFFFFFF)

Long logical left shift.

#define ASLB(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFF000000)

Byte arithmetic left shift.

#define ASLW(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFFFF0000)

Word arithmetic left shift.

#define ASLL(LSL_A, LSL_B)   LSL(LSL_A,LSL_B,0xFFFFFFFF)

Long arithmetic left shift.

#define ROR(ROR_A, ROR_D, ROR_MSK, ROR_SZ)

Generic right rotation.

#define ROL(ROR_A, ROR_D, ROR_MSK, ROR_SZ)

Generic left rotation.

#define RORB(ROR_A, ROR_B)   ROR(ROR_A,ROR_B,0xFF000000,8)

generic right shift.

#define RORW(ROR_A, ROR_B)   ROR(ROR_A,ROR_B,0xFFFF0000,16)

generic right shift.

#define RORL(ROR_A, ROR_B)   ROR(ROR_A,ROR_B,0xFFFFFFFF,32)

generic right shift.

#define ROLB(ROR_A, ROR_B)   ROL(ROR_A,ROR_B,0xFF000000,8)

generic right shift.

#define ROLW(ROR_A, ROR_B)   ROL(ROR_A,ROR_B,0xFFFF0000,16)

generic right shift.

#define ROLL(ROR_A, ROR_B)   ROL(ROR_A,ROR_B,0xFFFFFFFF,32)

generic right shift.

#define ROXR(ROR_A, ROR_D, ROR_MSK, ROR_SZ)

Generic right extend-bit rotation.

#define ROXL(ROR_A, ROR_D, ROR_MSK, ROR_SZ)

Generic left extend-bit rotation.

#define ROXRB(ROR_A, ROR_B)   ROXR(ROR_A,ROR_B,0xFF000000,8)

generic right shift.

#define ROXRW(ROR_A, ROR_B)   ROXR(ROR_A,ROR_B,0xFFFF0000,16)

generic right shift.

#define ROXRL(ROR_A, ROR_B)   ROXR(ROR_A,ROR_B,0xFFFFFFFF,32)

generic right shift.

#define ROXLB(ROR_A, ROR_B)   ROXL(ROR_A,ROR_B,0xFF000000,8)

generic right shift.

#define ROXLW(ROR_A, ROR_B)   ROXL(ROR_A,ROR_B,0xFFFF0000,16)

generic right shift.

#define ROXLL(ROR_A, ROR_B)   ROXL(ROR_A,ROR_B,0xFFFFFFFF,32)

generic right shift.